1. Field of the Invention
Embodiments of the present invention relate to circuits. More specifically, embodiments of the present invention relate to the design of a variable-impedance gated decoupling cell.
2. Related Art
Recent developments in integrated circuit technologies have enabled designers to create complex integrated circuits on semiconductor chips which include both digital and analog circuitry. A “system-on-a-chip” (SOC) is one such integrated circuit, which includes different types of circuits that enable the SOC to perform a wide variety of functions. For example, SOCs can include controllers, processors, graphics and audio processors, transceivers, networking devices, communication circuits, memories, and other types of circuits. These functional capabilities enable SOCs to be used in devices such as cell phones, personal digital assistants, embedded systems, portable computers, media players, desktop computers, household electronics and appliances, device controllers, and many other devices.
Generally, SOCs (and virtually all other types of semiconductor chips) include power rails (commonly called Vdd) and ground rails (commonly called Vss), which are separately coupled from the SOC to a printed circuit board (PCB) power plane through inductive packaging connections to provide electrical power (and ground) for the SOC. On-chip decoupling capacitors are often coupled between the power and ground rails to filter out unwanted high frequency noise in the Vdd signal. (Note that we call the signal on the power rail the “Vdd signal.”) Depending on the application, the decoupling capacitors can be a metal-oxide-silicon (MOS) decoupling capacitors, metal-insulator-metal (MIM) capacitors, varactors, or other forms of decoupling capacitors. For example, FIG. 1 presents a circuit diagram of a typical MOS decoupling capacitor 100.
Unfortunately, the parallel combination of the inductive packaging connection to Vdd and on-chip decoupling capacitors creates a resonant LC circuit whose impedance can be high in a range of frequencies near a resonance frequency (ωres). Consequently, noise in the range of frequencies near ωres is not filtered from the Vdd signal. Depending on the application, this range of frequencies can include frequencies from a within a few Hz of ωres to within kHz, MHz, or GHz of ωres.
To remedy this problem, some designers have proposed placing dissipative elements, such as fixed-value resistors, in series with the decoupling capacitors. FIG. 2 presents a circuit diagram of resistor 202 in series with MOS capacitor 200. Unfortunately, while eliminating noise near ωres, this technique can reduce the efficiency of the decoupling capacitors for controlling noise in the Vdd signal in other frequency ranges. In a related development, some designers have proposed adding a MOS transistor in series with the decoupling capacitor to enable a system to disable the circuit path to the decoupling capacitor when the decoupling capacitor is not required. Unfortunately, the MOS transistors in these systems are either “ON” or “OFF,” and in circumstances where the MOS transistors are ON, the system can still experience excessive noise near ωres.
Hence, what is needed is a decoupling mechanism which does not suffer from the above-described problems.